1. Field of the Invention
The present invention relates to a current drive circuit and a semiconductor memory device, and specifically, to a current drive circuit configured with a tristate buffer and a semiconductor memory device equipped with that current drive circuit.
2. Description of the Background Art
Recently, an MRAM (Magnetic Random Access Memory) device has been receiving attention as a non-volatile memory device of low power consumption. The MRAM device is a memory device that stores data in a non-volatile manner using a plurality of magnetic thin films formed in a semiconductor circuit, and enables a random access for each of magnetic thin films.
Additionally, an OUM (Ovonic Unified Memory) device has been receiving attention as well, as a non-volatile memory device of low power consumption, and capable of easy integration with a conventional CMOS process technique. The OUM device is a memory device that uses a material referred to as chalcogenide, which changes phases in accordance with resistance heating, for memory cells to store data in non-volatile manner.
In these MRAM device and OUM device, in data writing mode, a current drive circuit that operates supplied with a prescribed supply voltage causes a current to flow through a select bit line, with a non-select bit line in a floating state. By the prescribed amount of current flowing through the select bit line, the magnetization direction of a ferromagnetic layer referred to as a free magnetization layer changes in a memory cell of MRAM, while a phase change region referred to as a chalcogenide layer changes the phase in a memory cell of OUM device. Utilizing the phenomenon that the resistance value changes in accordance with the change of the internal state, data are stored in memory cells in non-volatile manner.
In a conventional current drive circuit for MRAM and OUM devices, attempts has been made to attain higher speed and lower power consumption, which includes inserting, between a write driver and a power supply node, means for controlling current supply for providing either a large or a small current, thereby switching the amount of the current as appropriate to supply to the write driver (Japanese Patent Laying-Open No. 5-347550).
On the other hand, when the conventional current drive circuit above causes a current to flow through a load (corresponding mainly to a discharging transistor of the current drive circuit in MRAM device, and corresponding mainly to a memory cell itself in OUM device), the drain potential of a driver transistor changes due to the voltage drop resulted from load resistance. Specifically, the voltage drop resulted from load resistance effects to reduce the source-drain voltage of the driver transistor. Therefore, in the conventional current drive circuit above, the driving current supplying to the load undesirably decreases depending on the load resistance.
In order to address the situation, the thickness of the gate insulating film of the driver transistor may be made thinner to increase the current drivability. In the conventional current drive circuit, however, the voltage difference of supply voltage level (2.5V) is applied to any one of source-drain, source-gate and gate-drain of the driver transistor, and hence the gate insulating film must be thick film that has breakdown resistance tolerable to that voltage difference. Therefore, the drivability of the current drive circuit can not be increased.
Further, since a voltage of power source voltage level is applied to source-drain of the driver transistor when a current is not caused to flow by the current drive circuit, a leakage current is resulted in the driver transistor. Specifically, as in MRAM device, when a current drive circuit is provided at each opposing sides of every bit line, the total amount of the leakage current is not negligible from the viewpoint of power consumption.